Performance Issues

In this lecture we closed chapter 8 on shared memory multicomputers covering section 8.6 of our textbook. We discussed the problems of cache consistency and false sharing when several processors share the same values, introducing the flush directive to update the value of a shared variable by the value in the cash. Assigning too much to shared memory variables can be as detrimental to the performance as invoking the flush directive too many times.

Three types of synchronization were distinguished: mutual exclusion, barriers, and event synchronization. We recommended the atomic pragma to have short critical sections excluding computations that destroy the parallelism. OpenMP has the barrier pragma which causes all threads to wait till every thread has arrived at the barrier. The same caution as with MPI barrier must be used. The event synchronization brought back memories from dynamic load balancing: one processor signals the event (e.g.: termination or updated data) raising a flag, while all other processors probe the status of the flag. This is an illustration of how to run multiple threads on one processor, interleaving the computations with probing.

We ended the lecture discussion sequential consistency of a program, making the analogy between a memory fence and the flushing of the buffers when writing.